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Silicon Quantum Fabrication PhD | Scaling Atomically Precise Devices

Project 2660 · University College London · Department of Electronic and Electrical Engineering

Application workspace

Save this opportunity and prepare around its actual requirements. Confirm deadlines and eligibility at the original source.

Country or region
United Kingdom
Application deadline
2027-01-08 (confirm the exact time with the source)
Funding
Four-year UELA award, expected to start in October 2027; the project-specific 2027–28 catalogue lists Standard/Home-fee eligibility. The UELA page lists an enhanced stipend and research-training support, but labels £26,022 as both the 2027/28 estimate and a 2026/27 amount in different sections. Confirm the applicable stipend, research-training amount and fee terms with UCL.

The research opportunity

Project overview This four-year UCL Electronic and Electrical Engineering PhD, led by Dr Taylor Stock, is expected to start on 1 October 2027. It aims to make atomically precise silicon-device fabrication more repeatable and scalable. Using a scanning tunnelling microscope (STM) and hydrogen-desorption lithography (HDL), the student will develop fabrication protocols for producing multiple nominally identical single-atom devices on one silicon chip.

Research and training The advertised work includes image-recognition tools and control and automation protocols for the ultra-high-vacuum (UHV) STM used in HDL. Training includes STM operation and control, standard cleanroom microfabrication, and advanced materials characterization, including specialized scanning-probe methods. The doctorate is part of a wider collaboration on scalable silicon quantum processors based on dopant-atom spin qubits. The listing describes collaboration and exposure to device and materials theory, measurement and operation; it does not say the student will independently develop the full processor.

Project scope and preparation The project description does not specify a target number of devices per chip, fabrication throughput, full-device yield, reproducibility threshold, image-recognition accuracy, software stack or work-package timeline. Prior STM, UHV or cleanroom experience is not stated as a project-specific entry requirement. General UCL EEE requirements are a relevant UK Master's qualification or at least an upper-second-class UK Bachelor's degree (or equivalent). The general English Level 1 requirement lists IELTS Academic 6.5 overall with at least 6.0 in each component; confirm equivalency and individual eligibility with UCL.

Application and fee eligibility The exact UELA 2027–28 catalogue identifies project 2531cs1054 as a Standard project for Home-fee candidates only. This conflicts with the source listing's “Students Worldwide” label and its generic statement about covering the Home–International fee difference. Applicants should ask UCL to confirm their fee status for this specific project before preparing a full application. The deadline is 8 January 2027 at 12:00 UK time, and two references must be received by then. The applicant guide recommends submitting by 16 December 2026 to avoid holiday delays and allows up to three project choices. The expected start date is 1 October 2027.

Funding The award is four years, with Home-rate tuition and an enhanced UELA stipend plus research-training support. The UELA page lists £26,022 as the expected 2027/28 stipend in its key summary but labels the same amount as 2026/27 later on the page. The year that applies to this award, future increases, fee terms and the amount of research-training support need written confirmation.

Contact: Dr Taylor Stock; eee-phd-admin@ucl.ac.uk.

Research and application brief

Report generated: . This date does not confirm that recruitment remains open.

Information updated: . Recheck the original notice before applying.

Show report contents

Silicon Quantum Fabrication PhD | Scaling Atomically Precise Devices

Research cut-off: 6 November 2026
Assessment label: Strong but verify fit

Quick Decision

This is a specific four-year doctoral project at University College London (UCL), led by Dr Taylor Stock, focused on increasing the repeatability and throughput of atomically precise silicon-device fabrication. The work combines scanning-tunnelling-microscope (STM) hydrogen-desorption lithography, image-recognition tools and instrument control/automation, with training in cleanroom microfabrication and materials characterization. It sits within a wider collaboration on dopant-atom spin qubits in silicon. The strongest attraction is the concrete engineering work and access to a research environment already publishing on atom-scale silicon devices.

The first decision gate is fee status. The exact UCL project catalogue identifies project 2531cs1054 as a Standard project open only to Home-fee candidates. That conflicts with the initial summary’s “Students Worldwide” label and with general programme wording about some international-fee awards. The project-specific catalogue is the controlling evidence; an applicant should have UCL confirm their fee classification before preparing a full application. The application deadline is 8 January 2027 at 12:00 UK time, and two references must be received by then. The four-year award is stated to start on 1 October 2027. UELA 2027-28 Advertised Projects Catalogue UCL EPSRC Doctoral Landscape Award (UELA) Studentships UELA 27-28 Guidance for Applicants

The award page gives an estimated 2027/28 stipend of £26,022, but later labels the same estimate as 2026/27 and describes it as £1,500 above the London-weighted UKRI rate of £24,522. The standard EEE research degree page also describes a normal three-year full-time route, so the four-year UELA registration and upgrade arrangements need written clarification. UCL EPSRC Doctoral Landscape Award (UELA) Studentships Electronic and Electrical Engineering MPhil/PhD

Research Problem and Doctoral Work

The project addresses a manufacturing and engineering bottleneck in atomically precise silicon device fabrication: translating demonstrated individual process steps into a more repeatable route for producing multiple nominally identical single-atom devices on one silicon chip. The advertisement places the student in a scanning-probe fabrication group at the London Centre for Nanotechnology (LCN) and UCL’s Department of Electronic and Electrical Engineering. The stated tools include an STM and hydrogen-desorption lithography (HDL), together with image-recognition tools and control and automation protocols for an ultra-high-vacuum (UHV) STM. The work is part of a larger distributed quantum-processor effort based on dopant-atom spin qubits. UELA 2027-28 Advertised Projects Catalogue Electronic Materials and Devices Donor spin qubits in silicon

The advertised doctoral tasks are unusually concrete for a general studentship listing:

  • Develop fabrication protocols that can support multiple nominally identical single-atom devices on a single silicon chip.
  • Improve process throughput and scale-up using image-recognition tools and control/automation for the UHV STM used in HDL.
  • Become skilled in STM operation and control, standard cleanroom microfabrication, and advanced materials characterization.
  • Work with collaborators and gain exposure to device/materials theory and modelling, as well as device measurement and operation.

The project’s advertised goal is scale-up; the public description does not define industrial production, an eventual commercial process, a processor delivery date, or numeric targets. It gives no baseline or success threshold for throughput, devices per chip, image-recognition performance, reproducibility, yield, or instrument uptime. Applicants should ask how these metrics will be set and which tasks the student will own versus contribute to through the wider collaboration.

Recent publications give useful context but should not be read as promised outputs. A 2024 paper from the group reports 97 ± 2% single-arsenic incorporation within four lattice sites under the paper’s test conditions. This is a narrowly defined incorporation result, not full-device yield, repeated multi-device chip yield or a throughput benchmark. Single-Atom Control of Arsenic Incorporation in Silicon for High-Yield Artificial Lattice Fabrication A separate 2024 study examines EUV-induced hydrogen desorption as a possible route toward parallel silicon-device patterning; it is adjacent scale-up work, not the advertised STM image-recognition project. EUV-induced hydrogen desorption as a step towards large-scale silicon quantum device patterning A 2023 study of electronic properties in ultra-thin dopant layers shows relevant materials-characterization research in the surrounding field. Momentum space imaging of ultra-thin electron liquids in δ-doped silicon

Other research provides comparison points rather than direct evidence for this project. A 2023 Science Advances paper reports resistless EUV silicon patterning at a 75 nm half-pitch, a different scale and mechanism from atomic-precision dopant devices. Resistless EUV lithography: Photon-induced oxide patterning on silicon A 2022 study investigates charge transport in atomically thin dopant nanostructures, relevant to the fabrication-to-device-characterization link. In operando charge transport imaging of atomically thin dopant nanostructures in silicon An external 2024 paper reports machine-learning-assisted atom-qubit manufacturing and 91.3% test accuracy in its described dataset; it is not a UCL/Stock-group result and does not establish the expected performance or generalization of the proposed STM image-recognition tools. Machine Learning-Assisted Precision Manufacturing of Atom Qubits in Silicon The UCL case study on AI-assisted quantum-computer manufacturing illustrates earlier institutional activity but does not guarantee the same project partner, software or student role. Manufacturing a Quantum Computer using Artificial Intelligence A 2025 roadmap provides broader context on atomic-scale semiconductor devices and outstanding scale-up questions. Roadmap on atomic-scale semiconductor devices

School, Programme and Field Context

The host and likely registration environment is UCL Electronic and Electrical Engineering (EEE), with the advertised work located in the LCN and connected to UCL’s Electronic Materials and Devices and Quantum Devices research. UCL is the degree-awarding institution named in the project. The UELA studentship is the funding route; the general EEE MPhil/PhD page describes the academic research-degree route. It states relevant subject-entry expectations and a normal full-time duration of three calendar years, including an MPhil period followed by upgrade. How this route is adapted to a four-year UELA award is not clear from the public information and should be confirmed. UELA 2027-28 Advertised Projects Catalogue UCL EPSRC Doctoral Landscape Award (UELA) Studentships Electronic and Electrical Engineering MPhil/PhD

Institutional and subject indicators are positive but have different scopes. UCL reports 8th place overall in the QS World University Rankings 2027. UCL reports EEE at 2nd in the UK in a 2026 Times subject ranking. REF 2021 reports 97% of UCL Engineering research at 3*/4* and fourth place nationally by share rated 4*. The QS figure is university-wide, the Times figure is subject-specific, and REF is a broad Engineering submission; none is a rating of this group, supervisor or quantum-device subfield. UCL Rankings UCL Electronic and Electrical Engineering ranked 2nd in the UK REF 2021: UCL Engineering

The training environment appears relevant. The EEE Electronic Materials and Devices group describes research in atomic-scale devices, materials, fabrication and characterization. The Quantum Devices pages describe solid-state quantum-device work, including donor-spin qubits in silicon, and link fabrication to theory and measurement. Electronic Materials and Devices Research: Quantum Devices Group Donor spin qubits in silicon The LCN lists shared nanofabrication and microscopy services, including cleanroom resources, while UCL’s QUES2T initiative describes additional quantum-engineering facilities such as electron-beam lithography, silicon processing and dilution refrigerators. These are institution-level capability statements: they do not confirm that this student will have allocated time on a particular STM/UHV system, cleanroom tool or cryostat. Our services: London Centre for Nanotechnology QUES2T

Supervisor and Lab Assessment

The project catalogue names Dr Taylor Stock as principal supervisor. UCL’s EEE staff listing also identifies Professor Neil Curson in nanoelectronics and nanofabrication, and the Electronic Materials and Devices group pages place atomic-scale silicon fabrication within an established research environment. UELA 2027-28 Advertised Projects Catalogue Academic staff: Electronic and Electrical Engineering Electronic Materials and Devices The donor-spin-qubit research page shows a broader programme connecting atomically patterned dopants with silicon quantum-device research, rather than a standalone fabrication exercise. Donor spin qubits in silicon

The recent work most directly relevant to Stock’s project is the 2024 single-atom arsenic incorporation paper. Its contribution is evidence that a carefully controlled single-atom fabrication step can be achieved with high reported incorporation under the tested conditions; it does not solve the full problem of repeated multi-device fabrication. Single-Atom Control of Arsenic Incorporation in Silicon for High-Yield Artificial Lattice Fabrication The 2024 EUV hydrogen-desorption paper explores a potentially parallel route and therefore offers a useful comparison for scale-up thinking, but it should not be mistaken for the student’s stated STM/UHV-control task. EUV-induced hydrogen desorption as a step towards large-scale silicon quantum device patterning The 2023 dopant-layer study adds relevant characterization context. Momentum space imaging of ultra-thin electron liquids in δ-doped silicon Together, these works support subject continuity and a plausible research setting, while leaving the student’s precise publication plan and supervisory roles unknown.

Before applying, ask who will provide day-to-day supervision, whether a co-supervisor will cover automation or device measurement, which STM system is available, how instrument downtime is handled, and whether use of shared facilities or visits to national/international collaborators are funded. The public facility pages show capability, not allocation or service-level commitments. Our services: London Centre for Nanotechnology QUES2T

Funding, Application, and Living Cost

The UELA page describes approximately 50 funded places, a four-year award and a start date of 1 October 2027. It lists an estimated stipend of £26,022 for 2027/28, plus research-training support. It also says that project-specific fee restrictions apply. The exact project catalogue marks 2531cs1054 Standard—Home fee only. The generic availability of a limited number of international-fee awards therefore does not demonstrate eligibility for this project. Fee classification can depend on the applicable rules and the applicant’s circumstances, so the decisive question is whether UCL classifies the particular applicant as Home-fee eligible for this project. UELA 2027-28 Advertised Projects Catalogue UCL EPSRC Doctoral Landscape Award (UELA) Studentships

The deadline is 8 January 2027 at 12:00 UK time. Two references must arrive by that deadline; the applicant guide encourages submitting by 16 December 2026 because of the holiday period. The guide describes project-specific prompts and permits up to three project applications/choices. A selected candidate may still need to complete the formal UCL study application. Check the current portal instructions and reference procedure before submission. UCL EPSRC Doctoral Landscape Award (UELA) Studentships UELA 27-28 Guidance for Applicants

There is a material published stipend inconsistency: the key-information section labels £26,022 as the 2027/28 estimate, while a later funding paragraph describes £26,022 as the expected 2026/27 amount and compares it with the London-weighted UKRI rate. Obtain written confirmation of the stipend that will apply in 2027/28, the annual increase mechanism, fees covered and the amount/conditions of research-training support. UCL EPSRC Doctoral Landscape Award (UELA) Studentships

For a rough London budget comparison, UCL’s current illustrative postgraduate estimate lists a self-catered hall at an average £337 per week, or £17,524 for 52 weeks, plus £4,903.60 for other essential costs. Together these are £22,427.60. Compared with the £26,022 estimated stipend, the arithmetic difference is about £3,594.40. This is not a forecast or affordability guarantee: UCL says the hall estimate uses 2025/26 rates and the other-cost estimate uses a 2024 survey uprated by 10%; 2027/28 prices, accommodation availability, visa/health charges, deposits, travel, discretionary spending and costs outside the listed essentials may differ. UCL’s separate 2026/27 accommodation page gives room fees and contract dates, not a guarantee of a particular room. How much does it cost to study at UCL? Fees and contract dates for 2026-27 UCL EPSRC Doctoral Landscape Award (UELA) Studentships

Applicant Fit and Preparation

The project is best suited to someone interested in hands-on engineering at the intersection of semiconductor processing, nanotechnology and quantum devices, and willing to combine instrument work with image/data analysis and automation. It may appeal to applicants who enjoy iterative problem-solving, careful process control and collaboration across fabrication, theory and measurement. It may be less suitable for someone seeking an exclusively theoretical doctorate or expecting the project description to provide fixed yield/throughput targets before discussions with the group.

The listing does not state prior STM, UHV or cleanroom experience as a formal prerequisite. General UCL EEE entry requirements call for a relevant UK Master’s qualification or at least an upper-second-class UK Bachelor’s degree (or equivalent); example backgrounds include EEE, communications, computer science and relevant physical or materials sciences. UCL’s English Level 1 route lists IELTS Academic 6.5 overall with 6.0 in each component. Applicants should check equivalency, accepted English tests and exemptions against the current official pages. Electronic and Electrical Engineering MPhil/PhD English Language Requirements for Graduate Study

Suggested preparation—not stated formal requirements—includes examples of programming or automation, image/data analysis, experimental measurement, device/materials physics, and work where reproducibility mattered. An application can explain how the candidate would approach a fabrication-to-device feedback loop without claiming expertise they do not have. Two references are mandatory for the UELA application by the stated deadline. UELA 27-28 Guidance for Applicants

Career paths plausibly connected to the training include semiconductor or quantum-device R&D, nanofabrication and process engineering, scanning-probe or instrumentation work, device characterization, and academic research in quantum devices or electronic materials. UK government sources describe quantum skills demand and semiconductor workforce needs, but those broad snapshots and sector plans cannot predict a graduate’s individual job prospects. The Quantum Skills Taskforce reports a rolling-average 114 quantum vacancies as of 31 January 2025, a time-bounded count rather than a current vacancy guarantee. A government workforce study estimates about 27,245 UK semiconductor workers and discusses technical roles across R&D, process and manufacturing. The 2026 Digital and Technologies Jobs Plan and the National Quantum Strategy describe wider policy priorities and public investment, not project-specific funding or placement outcomes. UK Quantum Skills Taskforce report UK Semiconductor workforce study: executive summary Digital and Technologies Jobs Plan National Quantum Strategy (accessible webpage)

Next Actions and Questions to Verify

Before Applying

  1. Ask the UELA team to confirm in writing whether the applicant’s formal fee status qualifies for project 2531cs1054. Resolve this first because the exact catalogue says Home-fee only. UELA 2027-28 Advertised Projects Catalogue
  2. Confirm the guaranteed 2027/28 stipend, annual increase, fee coverage, research-training support and the year-label inconsistency. UCL EPSRC Doctoral Landscape Award (UELA) Studentships
  3. Confirm the deadline, required application components and reference submission route; aim for the encouraged 16 December 2026 submission if possible. UCL EPSRC Doctoral Landscape Award (UELA) Studentships UELA 27-28 Guidance for Applicants
  4. Check degree equivalence and English evidence under the current UCL EEE requirements. Electronic and Electrical Engineering MPhil/PhD English Language Requirements for Graduate Study

At Interview

  • What baseline and target measures will define throughput, number of devices per chip, reproducibility, image-recognition performance and automation success?
  • Which tasks are student-owned, and how do they connect to the wider theory, device measurement and operation work?
  • Who will provide day-to-day supervision, and what experience/support exists for instrument control and image-analysis development?
  • Which STM/UHV instrument and cleanroom resources are allocated, and what contingency exists for downtime or access constraints?

Before Accepting an Offer

  • How do the four funded years map to EEE registration, MPhil-to-PhD upgrade, tuition-fee coverage and thesis submission? UCL EPSRC Doctoral Landscape Award (UELA) Studentships Electronic and Electrical Engineering MPhil/PhD
  • What is the project-specific RTSG amount, and are collaborator visits, travel or shared-facility charges covered?
  • What is the expected working pattern across EEE, LCN and collaborators, and are any external placements or visits required?
  • Request the final written stipend and fee terms and an updated 2027/28 living-cost estimate before deciding on affordability.

Evidence and Sources

The following primary and official sources underpin the assessment. Ranking, policy and facilities pages are used only for their stated scope; they do not establish project-specific outcomes or access.

Project, Programme and Application

School, Supervisors and Facilities

Papers and Field Context

Skills, Policy and Career Context

Costs and Accommodation

Sources

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